From 3883104bc3892dcc0a094804b3add83e0a08d68d Mon Sep 17 00:00:00 2001 From: Anatole Denis Date: Thu, 24 Nov 2016 15:16:21 +0100 Subject: tests/py: Unmask negative set lookup Many testcases were masked because of bug #888. This series of patches unmasks them Signed-off-by: Anatole Denis Signed-off-by: Pablo Neira Ayuso --- tests/py/ip6/rt.t.payload.inet | 90 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 90 insertions(+) (limited to 'tests/py/ip6/rt.t.payload.inet') diff --git a/tests/py/ip6/rt.t.payload.inet b/tests/py/ip6/rt.t.payload.inet index 30e29a58..8fb717f0 100644 --- a/tests/py/ip6/rt.t.payload.inet +++ b/tests/py/ip6/rt.t.payload.inet @@ -22,6 +22,16 @@ inet test-inet input [ exthdr load 1b @ 43 + 0 => reg 1 ] [ lookup reg 1 set __set%d ] +# rt nexthdr != {udplite, ipcomp, udp, ah, sctp, esp, dccp, tcp, ipv6-icmp} +__set%d test-inet 3 +__set%d test-inet 0 + element 00000088 : 0 [end] element 0000006c : 0 [end] element 00000011 : 0 [end] element 00000033 : 0 [end] element 00000084 : 0 [end] element 00000032 : 0 [end] element 00000021 : 0 [end] element 00000006 : 0 [end] element 0000003a : 0 [end] +inet test-inet input + [ meta load nfproto => reg 1 ] + [ cmp eq reg 1 0x0000000a ] + [ exthdr load 1b @ 43 + 0 => reg 1 ] + [ lookup reg 1 set __set%d 0x1 ] + # rt nexthdr icmp inet test-inet input [ meta load nfproto => reg 1 ] @@ -75,6 +85,16 @@ inet test-inet input [ exthdr load 1b @ 43 + 0 => reg 1 ] [ lookup reg 1 set __set%d ] +# rt nexthdr != { 33, 55, 67, 88} +__set%d test-inet 3 +__set%d test-inet 0 + element 00000021 : 0 [end] element 00000037 : 0 [end] element 00000043 : 0 [end] element 00000058 : 0 [end] +inet test-inet input + [ meta load nfproto => reg 1 ] + [ cmp eq reg 1 0x0000000a ] + [ exthdr load 1b @ 43 + 0 => reg 1 ] + [ lookup reg 1 set __set%d 0x1 ] + # rt nexthdr { 33-55} __set%d test-inet 7 __set%d test-inet 0 @@ -85,6 +105,16 @@ inet test-inet input [ exthdr load 1b @ 43 + 0 => reg 1 ] [ lookup reg 1 set __set%d ] +# rt nexthdr != { 33-55} +__set%d test-inet 7 +__set%d test-inet 0 + element 00000000 : 1 [end] element 00000021 : 0 [end] element 00000038 : 1 [end] +inet test-inet input + [ meta load nfproto => reg 1 ] + [ cmp eq reg 1 0x0000000a ] + [ exthdr load 1b @ 43 + 0 => reg 1 ] + [ lookup reg 1 set __set%d 0x1 ] + # rt hdrlength 22 inet test-inet input [ meta load nfproto => reg 1 ] @@ -124,6 +154,16 @@ inet test-inet input [ exthdr load 1b @ 43 + 1 => reg 1 ] [ lookup reg 1 set __set%d ] +# rt hdrlength != { 33, 55, 67, 88} +__set%d test-inet 3 +__set%d test-inet 0 + element 00000021 : 0 [end] element 00000037 : 0 [end] element 00000043 : 0 [end] element 00000058 : 0 [end] +inet test-inet input + [ meta load nfproto => reg 1 ] + [ cmp eq reg 1 0x0000000a ] + [ exthdr load 1b @ 43 + 1 => reg 1 ] + [ lookup reg 1 set __set%d 0x1 ] + # rt hdrlength { 33-55} __set%d test-inet 7 __set%d test-inet 0 @@ -134,6 +174,16 @@ inet test-inet input [ exthdr load 1b @ 43 + 1 => reg 1 ] [ lookup reg 1 set __set%d ] +# rt hdrlength != { 33-55} +__set%d test-inet 7 +__set%d test-inet 0 + element 00000000 : 1 [end] element 00000021 : 0 [end] element 00000038 : 1 [end] +inet test-inet input + [ meta load nfproto => reg 1 ] + [ cmp eq reg 1 0x0000000a ] + [ exthdr load 1b @ 43 + 1 => reg 1 ] + [ lookup reg 1 set __set%d 0x1 ] + # rt type 22 inet test-inet input [ meta load nfproto => reg 1 ] @@ -173,6 +223,16 @@ inet test-inet input [ exthdr load 1b @ 43 + 2 => reg 1 ] [ lookup reg 1 set __set%d ] +# rt type != { 33, 55, 67, 88} +__set%d test-inet 3 +__set%d test-inet 0 + element 00000021 : 0 [end] element 00000037 : 0 [end] element 00000043 : 0 [end] element 00000058 : 0 [end] +inet test-inet input + [ meta load nfproto => reg 1 ] + [ cmp eq reg 1 0x0000000a ] + [ exthdr load 1b @ 43 + 2 => reg 1 ] + [ lookup reg 1 set __set%d 0x1 ] + # rt type { 33-55} __set%d test-inet 7 __set%d test-inet 0 @@ -183,6 +243,16 @@ inet test-inet input [ exthdr load 1b @ 43 + 2 => reg 1 ] [ lookup reg 1 set __set%d ] +# rt type != { 33-55} +__set%d test-inet 7 +__set%d test-inet 0 + element 00000000 : 1 [end] element 00000021 : 0 [end] element 00000038 : 1 [end] +inet test-inet input + [ meta load nfproto => reg 1 ] + [ cmp eq reg 1 0x0000000a ] + [ exthdr load 1b @ 43 + 2 => reg 1 ] + [ lookup reg 1 set __set%d 0x1 ] + # rt seg-left 22 inet test-inet input [ meta load nfproto => reg 1 ] @@ -222,6 +292,16 @@ inet test-inet input [ exthdr load 1b @ 43 + 3 => reg 1 ] [ lookup reg 1 set __set%d ] +# rt seg-left != { 33, 55, 67, 88} +__set%d test-inet 3 +__set%d test-inet 0 + element 00000021 : 0 [end] element 00000037 : 0 [end] element 00000043 : 0 [end] element 00000058 : 0 [end] +inet test-inet input + [ meta load nfproto => reg 1 ] + [ cmp eq reg 1 0x0000000a ] + [ exthdr load 1b @ 43 + 3 => reg 1 ] + [ lookup reg 1 set __set%d 0x1 ] + # rt seg-left { 33-55} __set%d test-inet 7 __set%d test-inet 0 @@ -232,3 +312,13 @@ inet test-inet input [ exthdr load 1b @ 43 + 3 => reg 1 ] [ lookup reg 1 set __set%d ] +# rt seg-left != { 33-55} +__set%d test-inet 7 +__set%d test-inet 0 + element 00000000 : 1 [end] element 00000021 : 0 [end] element 00000038 : 1 [end] +inet test-inet input + [ meta load nfproto => reg 1 ] + [ cmp eq reg 1 0x0000000a ] + [ exthdr load 1b @ 43 + 3 => reg 1 ] + [ lookup reg 1 set __set%d 0x1 ] + -- cgit v1.2.3