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authorFlorian Westphal <fw@strlen.de>2016-03-02 13:56:43 +0100
committerFlorian Westphal <fw@strlen.de>2016-03-02 13:56:43 +0100
commit16b4f10075e6a240919241b906ad0f5492b870ab (patch)
tree1477ab27230cbad844df429c1a044e1c587a7720 /tests/py/ip6/rt.t.payload.inet
parent10e0a903735f64c4b645445296664387d1524218 (diff)
tests: add/fix inet+exthdr tests
exhdr needs to be treated as if we'd test an ipv6 header field, i.e. inet, bridge, netdev need to add a dependency on ipv6 protocol. Signed-off-by: Florian Westphal <fw@strlen.de> Acked-by: Pablo Neira Ayuso <pablo@netfilter.org>
Diffstat (limited to 'tests/py/ip6/rt.t.payload.inet')
-rw-r--r--tests/py/ip6/rt.t.payload.inet58
1 files changed, 58 insertions, 0 deletions
diff --git a/tests/py/ip6/rt.t.payload.inet b/tests/py/ip6/rt.t.payload.inet
index 9dc51b97..e7a71234 100644
--- a/tests/py/ip6/rt.t.payload.inet
+++ b/tests/py/ip6/rt.t.payload.inet
@@ -1,10 +1,14 @@
# rt nexthdr 1
inet test-inet input
+ [ meta load nfproto => reg 1 ]
+ [ cmp eq reg 1 0x0000000a ]
[ exthdr load 1b @ 43 + 0 => reg 1 ]
[ cmp eq reg 1 0x00000001 ]
# rt nexthdr != 1
inet test-inet input
+ [ meta load nfproto => reg 1 ]
+ [ cmp eq reg 1 0x0000000a ]
[ exthdr load 1b @ 43 + 0 => reg 1 ]
[ cmp neq reg 1 0x00000001 ]
@@ -13,37 +17,51 @@ set%d test-inet 3
set%d test-inet 0
element 00000088 : 0 [end] element 0000006c : 0 [end] element 00000011 : 0 [end] element 00000033 : 0 [end] element 00000084 : 0 [end] element 00000032 : 0 [end] element 00000021 : 0 [end] element 00000006 : 0 [end] element 0000003a : 0 [end]
inet test-inet input
+ [ meta load nfproto => reg 1 ]
+ [ cmp eq reg 1 0x0000000a ]
[ exthdr load 1b @ 43 + 0 => reg 1 ]
[ lookup reg 1 set set%d ]
# rt nexthdr icmp
inet test-inet input
+ [ meta load nfproto => reg 1 ]
+ [ cmp eq reg 1 0x0000000a ]
[ exthdr load 1b @ 43 + 0 => reg 1 ]
[ cmp eq reg 1 0x00000001 ]
# rt nexthdr != icmp
inet test-inet input
+ [ meta load nfproto => reg 1 ]
+ [ cmp eq reg 1 0x0000000a ]
[ exthdr load 1b @ 43 + 0 => reg 1 ]
[ cmp neq reg 1 0x00000001 ]
# rt nexthdr 22
inet test-inet input
+ [ meta load nfproto => reg 1 ]
+ [ cmp eq reg 1 0x0000000a ]
[ exthdr load 1b @ 43 + 0 => reg 1 ]
[ cmp eq reg 1 0x00000016 ]
# rt nexthdr != 233
inet test-inet input
+ [ meta load nfproto => reg 1 ]
+ [ cmp eq reg 1 0x0000000a ]
[ exthdr load 1b @ 43 + 0 => reg 1 ]
[ cmp neq reg 1 0x000000e9 ]
# rt nexthdr 33-45
inet test-inet input
+ [ meta load nfproto => reg 1 ]
+ [ cmp eq reg 1 0x0000000a ]
[ exthdr load 1b @ 43 + 0 => reg 1 ]
[ cmp gte reg 1 0x00000021 ]
[ cmp lte reg 1 0x0000002d ]
# rt nexthdr != 33-45
inet test-inet input
+ [ meta load nfproto => reg 1 ]
+ [ cmp eq reg 1 0x0000000a ]
[ exthdr load 1b @ 43 + 0 => reg 1 ]
[ cmp lt reg 1 0x00000021 ]
[ cmp gt reg 1 0x0000002d ]
@@ -53,6 +71,8 @@ set%d test-inet 3
set%d test-inet 0
element 00000021 : 0 [end] element 00000037 : 0 [end] element 00000043 : 0 [end] element 00000058 : 0 [end]
inet test-inet input
+ [ meta load nfproto => reg 1 ]
+ [ cmp eq reg 1 0x0000000a ]
[ exthdr load 1b @ 43 + 0 => reg 1 ]
[ lookup reg 1 set set%d ]
@@ -61,27 +81,37 @@ set%d test-inet 7
set%d test-inet 0
element 00000000 : 1 [end] element 00000021 : 0 [end] element 00000038 : 1 [end]
inet test-inet input
+ [ meta load nfproto => reg 1 ]
+ [ cmp eq reg 1 0x0000000a ]
[ exthdr load 1b @ 43 + 0 => reg 1 ]
[ lookup reg 1 set set%d ]
# rt hdrlength 22
inet test-inet input
+ [ meta load nfproto => reg 1 ]
+ [ cmp eq reg 1 0x0000000a ]
[ exthdr load 1b @ 43 + 1 => reg 1 ]
[ cmp eq reg 1 0x00000016 ]
# rt hdrlength != 233
inet test-inet input
+ [ meta load nfproto => reg 1 ]
+ [ cmp eq reg 1 0x0000000a ]
[ exthdr load 1b @ 43 + 1 => reg 1 ]
[ cmp neq reg 1 0x000000e9 ]
# rt hdrlength 33-45
inet test-inet input
+ [ meta load nfproto => reg 1 ]
+ [ cmp eq reg 1 0x0000000a ]
[ exthdr load 1b @ 43 + 1 => reg 1 ]
[ cmp gte reg 1 0x00000021 ]
[ cmp lte reg 1 0x0000002d ]
# rt hdrlength != 33-45
inet test-inet input
+ [ meta load nfproto => reg 1 ]
+ [ cmp eq reg 1 0x0000000a ]
[ exthdr load 1b @ 43 + 1 => reg 1 ]
[ cmp lt reg 1 0x00000021 ]
[ cmp gt reg 1 0x0000002d ]
@@ -91,6 +121,8 @@ set%d test-inet 3
set%d test-inet 0
element 00000021 : 0 [end] element 00000037 : 0 [end] element 00000043 : 0 [end] element 00000058 : 0 [end]
inet test-inet input
+ [ meta load nfproto => reg 1 ]
+ [ cmp eq reg 1 0x0000000a ]
[ exthdr load 1b @ 43 + 1 => reg 1 ]
[ lookup reg 1 set set%d ]
@@ -99,27 +131,37 @@ set%d test-inet 7
set%d test-inet 0
element 00000000 : 1 [end] element 00000021 : 0 [end] element 00000038 : 1 [end]
inet test-inet input
+ [ meta load nfproto => reg 1 ]
+ [ cmp eq reg 1 0x0000000a ]
[ exthdr load 1b @ 43 + 1 => reg 1 ]
[ lookup reg 1 set set%d ]
# rt type 22
inet test-inet input
+ [ meta load nfproto => reg 1 ]
+ [ cmp eq reg 1 0x0000000a ]
[ exthdr load 1b @ 43 + 2 => reg 1 ]
[ cmp eq reg 1 0x00000016 ]
# rt type != 233
inet test-inet input
+ [ meta load nfproto => reg 1 ]
+ [ cmp eq reg 1 0x0000000a ]
[ exthdr load 1b @ 43 + 2 => reg 1 ]
[ cmp neq reg 1 0x000000e9 ]
# rt type 33-45
inet test-inet input
+ [ meta load nfproto => reg 1 ]
+ [ cmp eq reg 1 0x0000000a ]
[ exthdr load 1b @ 43 + 2 => reg 1 ]
[ cmp gte reg 1 0x00000021 ]
[ cmp lte reg 1 0x0000002d ]
# rt type != 33-45
inet test-inet input
+ [ meta load nfproto => reg 1 ]
+ [ cmp eq reg 1 0x0000000a ]
[ exthdr load 1b @ 43 + 2 => reg 1 ]
[ cmp lt reg 1 0x00000021 ]
[ cmp gt reg 1 0x0000002d ]
@@ -129,6 +171,8 @@ set%d test-inet 3
set%d test-inet 0
element 00000021 : 0 [end] element 00000037 : 0 [end] element 00000043 : 0 [end] element 00000058 : 0 [end]
inet test-inet input
+ [ meta load nfproto => reg 1 ]
+ [ cmp eq reg 1 0x0000000a ]
[ exthdr load 1b @ 43 + 2 => reg 1 ]
[ lookup reg 1 set set%d ]
@@ -137,27 +181,37 @@ set%d test-inet 7
set%d test-inet 0
element 00000000 : 1 [end] element 00000021 : 0 [end] element 00000038 : 1 [end]
inet test-inet input
+ [ meta load nfproto => reg 1 ]
+ [ cmp eq reg 1 0x0000000a ]
[ exthdr load 1b @ 43 + 2 => reg 1 ]
[ lookup reg 1 set set%d ]
# rt seg-left 22
inet test-inet input
+ [ meta load nfproto => reg 1 ]
+ [ cmp eq reg 1 0x0000000a ]
[ exthdr load 1b @ 43 + 3 => reg 1 ]
[ cmp eq reg 1 0x00000016 ]
# rt seg-left != 233
inet test-inet input
+ [ meta load nfproto => reg 1 ]
+ [ cmp eq reg 1 0x0000000a ]
[ exthdr load 1b @ 43 + 3 => reg 1 ]
[ cmp neq reg 1 0x000000e9 ]
# rt seg-left 33-45
inet test-inet input
+ [ meta load nfproto => reg 1 ]
+ [ cmp eq reg 1 0x0000000a ]
[ exthdr load 1b @ 43 + 3 => reg 1 ]
[ cmp gte reg 1 0x00000021 ]
[ cmp lte reg 1 0x0000002d ]
# rt seg-left != 33-45
inet test-inet input
+ [ meta load nfproto => reg 1 ]
+ [ cmp eq reg 1 0x0000000a ]
[ exthdr load 1b @ 43 + 3 => reg 1 ]
[ cmp lt reg 1 0x00000021 ]
[ cmp gt reg 1 0x0000002d ]
@@ -167,6 +221,8 @@ set%d test-inet 3
set%d test-inet 0
element 00000021 : 0 [end] element 00000037 : 0 [end] element 00000043 : 0 [end] element 00000058 : 0 [end]
inet test-inet input
+ [ meta load nfproto => reg 1 ]
+ [ cmp eq reg 1 0x0000000a ]
[ exthdr load 1b @ 43 + 3 => reg 1 ]
[ lookup reg 1 set set%d ]
@@ -175,6 +231,8 @@ set%d test-inet 7
set%d test-inet 0
element 00000000 : 1 [end] element 00000021 : 0 [end] element 00000038 : 1 [end]
inet test-inet input
+ [ meta load nfproto => reg 1 ]
+ [ cmp eq reg 1 0x0000000a ]
[ exthdr load 1b @ 43 + 3 => reg 1 ]
[ lookup reg 1 set set%d ]