# ah hdrlength 11-23 inet test-inet input [ meta load l4proto => reg 1 ] [ cmp eq reg 1 0x00000033 ] [ payload load 1b @ transport header + 1 => reg 1 ] [ cmp gte reg 1 0x0000000b ] [ cmp lte reg 1 0x00000017 ] # ah hdrlength != 11-23 inet test-inet input [ meta load l4proto => reg 1 ] [ cmp eq reg 1 0x00000033 ] [ payload load 1b @ transport header + 1 => reg 1 ] [ range neq reg 1 0x0000000b 0x00000017 ] # ah hdrlength { 11-23} __set%d test-inet 7 __set%d test-inet 0 element 00000000 : 1 [end] element 0000000b : 0 [end] element 00000018 : 1 [end] inet test-inet input [ meta load l4proto => reg 1 ] [ cmp eq reg 1 0x00000033 ] [ payload load 1b @ transport header + 1 => reg 1 ] [ lookup reg 1 set __set%d ] # ah hdrlength != { 11-23} __set%d test-inet 7 __set%d test-inet 0 element 00000000 : 1 [end] element 0000000b : 0 [end] element 00000018 : 1 [end] inet test-inet input [ meta load l4proto => reg 1 ] [ cmp eq reg 1 0x00000033 ] [ payload load 1b @ transport header + 1 => reg 1 ] [ lookup reg 1 set __set%d 0x1 ] # ah hdrlength {11, 23, 44 } __set%d test-inet 3 __set%d test-inet 0 element 0000000b : 0 [end] element 00000017 : 0 [end] element 0000002c : 0 [end] inet test-inet input [ meta load l4proto => reg 1 ] [ cmp eq reg 1 0x00000033 ] [ payload load 1b @ transport header + 1 => reg 1 ] [ lookup reg 1 set __set%d ] # ah hdrlength != {11, 23, 44 } __set%d test-inet 3 __set%d test-inet 0 element 0000000b : 0 [end] element 00000017 : 0 [end] element 0000002c : 0 [end] inet test-inet input [ meta load l4proto => reg 1 ] [ cmp eq reg 1 0x00000033 ] [ payload load 1b @ transport header + 1 => reg 1 ] [ lookup reg 1 set __set%d 0x1 ] # ah reserved 22 inet test-inet input [ meta load l4proto => reg 1 ] [ cmp eq reg 1 0x00000033 ] [ payload load 2b @ transport header + 2 => reg 1 ] [ cmp eq reg 1 0x00001600 ] # ah reserved != 233 inet test-inet input [ meta load l4proto => reg 1 ] [ cmp eq reg 1 0x00000033 ] [ payload load 2b @ transport header + 2 => reg 1 ] [ cmp neq reg 1 0x0000e900 ] # ah reserved 33-45 inet test-inet input [ meta load l4proto => reg 1 ] [ cmp eq reg 1 0x00000033 ] [ payload load 2b @ transport header + 2 => reg 1 ] [ cmp gte reg 1 0x00002100 ] [ cmp lte reg 1 0x00002d00 ] # ah reserved != 33-45 inet test-inet input [ meta load l4proto => reg 1 ] [ cmp eq reg 1 0x00000033 ] [ payload load 2b @ transport header + 2 => reg 1 ] [ range neq reg 1 0x00002100 0x00002d00 ] # ah reserved {23, 100} __set%d test-inet 3 __set%d test-inet 0 element 00001700 : 0 [end] element 00006400 : 0 [end] inet test-inet input [ meta load l4proto => reg 1 ] [ cmp eq reg 1 0x00000033 ] [ payload load 2b @ transport header + 2 => reg 1 ] [ lookup reg 1 set __set%d ] # ah reserved != {23, 100} __set%d test-inet 3 __set%d test-inet 0 element 00001700 : 0 [end] element 00006400 : 0 [end] inet test-inet input [ meta load l4proto => reg 1 ] [ cmp eq reg 1 0x00000033 ] [ payload load 2b @ transport header + 2 => reg 1 ] [ lookup reg 1 set __set%d 0x1 ] # ah reserved { 33-55} __set%d test-inet 7 __set%d test-inet 0 element 00000000 : 1 [end] element 00002100 : 0 [end] element 00003800 : 1 [end] inet test-inet input [ meta load l4proto => reg 1 ] [ cmp eq reg 1 0x00000033 ] [ payload load 2b @ transport header + 2 => reg 1 ] [ lookup reg 1 set __set%d ] # ah reserved != { 33-55} __set%d test-inet 7 __set%d test-inet 0 element 00000000 : 1 [end] element 00002100 : 0 [end] element 00003800 : 1 [end] inet test-inet input [ meta load l4proto => reg 1 ] [ cmp eq reg 1 0x00000033 ] [ payload load 2b @ transport header + 2 => reg 1 ] [ lookup reg 1 set __set%d 0x1 ] # ah spi 111 inet test-inet input [ meta load l4proto => reg 1 ] [ cmp eq reg 1 0x00000033 ] [ payload load 4b @ transport header + 4 => reg 1 ] [ cmp eq reg 1 0x6f000000 ] # ah spi != 111 inet test-inet input [ meta load l4proto => reg 1 ] [ cmp eq reg 1 0x00000033 ] [ payload load 4b @ transport header + 4 => reg 1 ] [ cmp neq reg 1 0x6f000000 ] # ah spi 111-222 inet test-inet input [ meta load l4proto => reg 1 ] [ cmp eq reg 1 0x00000033 ] [ payload load 4b @ transport header + 4 => reg 1 ] [ cmp gte reg 1 0x6f000000 ] [ cmp lte reg 1 0xde000000 ] # ah spi != 111-222 inet test-inet input [ meta load l4proto => reg 1 ] [ cmp eq reg 1 0x00000033 ] [ payload load 4b @ transport header + 4 => reg 1 ] [ range neq reg 1 0x6f000000 0xde000000 ] # ah spi {111, 122} __set%d test-inet 3 __set%d test-inet 0 element 6f000000 : 0 [end] element 7a000000 : 0 [end] inet test-inet input [ meta load l4proto => reg 1 ] [ cmp eq reg 1 0x00000033 ] [ payload load 4b @ transport header + 4 => reg 1 ] [ lookup reg 1 set __set%d ] # ah spi != {111, 122} __set%d test-inet 3 __set%d test-inet 0 element 6f000000 : 0 [end] element 7a000000 : 0 [end] inet test-inet input [ meta load l4proto => reg 1 ] [ cmp eq reg 1 0x00000033 ] [ payload load 4b @ transport header + 4 => reg 1 ] [ lookup reg 1 set __set%d 0x1 ] # ah spi { 111-122} __set%d test-inet 7 __set%d test-inet 0 element 00000000 : 1 [end] element 6f000000 : 0 [end] element 7b000000 : 1 [end] inet test-inet input [ meta load l4proto => reg 1 ] [ cmp eq reg 1 0x00000033 ] [ payload load 4b @ transport header + 4 => reg 1 ] [ lookup reg 1 set __set%d ] # ah spi != { 111-122} __set%d test-inet 7 __set%d test-inet 0 element 00000000 : 1 [end] element 6f000000 : 0 [end] element 7b000000 : 1 [end] inet test-inet input [ meta load l4proto => reg 1 ] [ cmp eq reg 1 0x00000033 ] [ payload load 4b @ transport header + 4 => reg 1 ] [ lookup reg 1 set __set%d 0x1 ] # ah sequence 123 inet test-inet input [ meta load l4proto => reg 1 ] [ cmp eq reg 1 0x00000033 ] [ payload load 4b @ transport header + 8 => reg 1 ] [ cmp eq reg 1 0x7b000000 ] # ah sequence != 123 inet test-inet input [ meta load l4proto => reg 1 ] [ cmp eq reg 1 0x00000033 ] [ payload load 4b @ transport header + 8 => reg 1 ] [ cmp neq reg 1 0x7b000000 ] # ah sequence {23, 25, 33} __set%d test-inet 3 __set%d test-inet 0 element 17000000 : 0 [end] element 19000000 : 0 [end] element 21000000 : 0 [end] inet test-inet input [ meta load l4proto => reg 1 ] [ cmp eq reg 1 0x00000033 ] [ payload load 4b @ transport header + 8 => reg 1 ] [ lookup reg 1 set __set%d ] # ah sequence != {23, 25, 33} __set%d test-inet 3 __set%d test-inet 0 element 17000000 : 0 [end] element 19000000 : 0 [end] element 21000000 : 0 [end] inet test-inet input [ meta load l4proto => reg 1 ] [ cmp eq reg 1 0x00000033 ] [ payload load 4b @ transport header + 8 => reg 1 ] [ lookup reg 1 set __set%d 0x1 ] # ah sequence { 23-33} __set%d test-inet 7 __set%d test-inet 0 element 00000000 : 1 [end] element 17000000 : 0 [end] element 22000000 : 1 [end] inet test-inet input [ meta load l4proto => reg 1 ] [ cmp eq reg 1 0x00000033 ] [ payload load 4b @ transport header + 8 => reg 1 ] [ lookup reg 1 set __set%d ] # ah sequence != { 23-33} __set%d test-inet 7 __set%d test-inet 0 element 00000000 : 1 [end] element 17000000 : 0 [end] element 22000000 : 1 [end] inet test-inet input [ meta load l4proto => reg 1 ] [ cmp eq reg 1 0x00000033 ] [ payload load 4b @ transport header + 8 => reg 1 ] [ lookup reg 1 set __set%d 0x1 ] # ah sequence 23-33 inet test-inet input [ meta load l4proto => reg 1 ] [ cmp eq reg 1 0x00000033 ] [ payload load 4b @ transport header + 8 => reg 1 ] [ cmp gte reg 1 0x17000000 ] [ cmp lte reg 1 0x21000000 ] # ah sequence != 23-33 inet test-inet input [ meta load l4proto => reg 1 ] [ cmp eq reg 1 0x00000033 ] [ payload load 4b @ transport header + 8 => reg 1 ] [ range neq reg 1 0x17000000 0x21000000 ]